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McSPI Registers
Table 24-10. SPI Registers (continued)
Offset
Address Acronym Register Name Section
174h MCSPI_TX3 McSPI channel i FIFO transmit buffer register Section 24.4.1.11
178h MCSPI_RX3 McSPI channel i FIFO receive buffer register Section 24.4.1.12
17Ch MCSPI_XFERLEVEL McSPI transfer levels register Section 24.4.1.13
180h MCSPI_DAFTX McSPI DMA address aligned FIFO transmitter
register
1A0h MCSPI_DAFRX McSPI DMA address aligned FIFO receiver register Section 24.4.1.15
4033
SPRUH73H–October 2011–Revised April 2013 Multichannel Serial Port Interface (McSPI)
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