Power, Reset, and Clock Management
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Table 8-92. CM_WKUP_CLKSTCTRL Register Field Descriptions (continued)
Bit Field Type Reset Description
3 CLKACTIVITY_SR_SYSC R 0h
This field indicates the state of the SMARTREFGLEX SYSCLK clock
LK
in the domain.
0x0 = Inact : Corresponding clock is gated
0x1 = Act : Corresponding clock is active
2 CLKACTIVITY_L4_WKUP R 1h
This field indicates the state of the L4_WKUP clock in the domain.
_GCLK
0x0 = Inact : Corresponding clock is gated
0x1 = Act : Corresponding clock is active
1-0 CLKTRCTRL R/W 2h
Controls the clock state transition of the always on clock domain.
0x0 = NO_SLEEP : NO_SLEEP: Sleep transition cannot be initiated.
Wakeup transition may however occur.
0x1 = SW_SLEEP : SW_SLEEP: Start a software forced sleep
transition on the domain.
0x2 = SW_WKUP : SW_WKUP: Start a software forced wake-up
transition on the domain.
0x3 = Reserved : Reserved.
616
Power, Reset, and Clock Management (PRCM) SPRUH73H–October 2011–Revised April 2013
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