CONTROL_MODULE Registers
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Table 9-100. ddr_cmd2_ioctrl Register Field Descriptions (continued)
Bit Field Type Reset Description
2-0 io_config_i R/W 0h 3-bit configuration input to program addr/cmd IO output impedance.
These connect as I2, I1, I0 to the corresponding DDR IO buffer.
See the DDR Impedance Control Settings table in the Control
Module Functional Description section for a definition of these bits.
858
Control Module SPRUH73H–October 2011–Revised April 2013
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