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Functional Description
Example Access denied.
Write access to shadow region 7's event enable set register (EESR):
1. The original value of the event enable register (EER) at address offset 0x1020 is 0x0.
2. The MPPA[7] is set to prevent user level accesses (UW = 0, UR = 0), but it allows supervisor level
accesses (SW = 1, SR = 1) with a privilege ID of 0. (AID0 = 1).
3. An EDMA3 programmer with a privilege ID of 0 attempts to perform a user-level write of a value of
0xFF00FF00 to shadow region 7's event enable set register (EESR) at address offset 0x2E30. Note
that the EER is a read-only register and the only way that you can write to it is by writing to the EESR.
Also remember that there is only one physical register for EER, EESR, etc. and that the shadow
regions only provide to the same physical set.
4. Since the MPPA[7] has UW = 0, though the privilege ID of the write access is set to 0, the access is
not allowed and the EER is not written to.
Table 11-19. Example Access Denied
Register Value Description
EER 0x0000 0000 Value in EER to begin with.
(offset 0x1020)
EESR 0xFF00 FF00 Value attempted to be written to shadow region 7's EESR.
(offset 0x2E30) ↓ This is done by an EDMA3 programmer with a privilege level of User and Privilege ID
of 0.
MPPA[7] 0x0000 04B0 Memory Protection Filter AID0 = 1, UW = 0, UR = 0, SW = 1, SR = 1.
(offset 0x082C)
X Access Denied
EER 0x0000 0000 Final value of EER
(offset 0x1020)
Example Access Allowed
Write access to shadow region 7's event enable set register (EESR):
1. The original value of the event enable register (EER) at address offset 0x1020 is 0x0.
2. The MPPA[7] is set to allow user-level accesses (UW = 1, UR = 1) and supervisor-level accesses (SW
= 1, SR = 1) with a privilege ID of 0. (AID0 = 1).
3. An EDMA3 programmer with a privilege ID of 0, attempts to perform a user-level write of a value of
0xABCD0123 to shadow region 7's event enable set register (EESR) at address offset 0x2E30. Note
that the EER is a read-only register and the only way that you can write to it is by writing to the EESR.
Also remember that there is only one physical register for EER, EESR, etc. and that the shadow
regions only provide to the same physical set.
4. Since the MPPA[7] has UW = 1 and AID0 = 1, the user-level write access is allowed.
5. Remember that accesses to shadow region registers are masked by their respective DRAE register. In
this example, the DRAE[7] is set of 0x9FF00FC2.
6. The value finally written to EER is 0x8BC00102.
909
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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