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22.1.2 Features ....................................................................................................... 3769
22.1.3 Protocols Supported ......................................................................................... 3769
22.1.4 Unsupported McASP Features ............................................................................. 3770
22.2 Integration ............................................................................................................... 3771
22.2.1 McASP Connectivity Attributes ............................................................................. 3771
22.2.2 McASP Clock and Reset Management .................................................................... 3772
22.2.3 McASP Pin List ............................................................................................... 3772
22.3 Functional Description ................................................................................................. 3773
22.3.1 Overview ....................................................................................................... 3773
22.3.2 Functional Block Diagram ................................................................................... 3774
22.3.3 Industry Standard Compliance Statement ................................................................ 3777
22.3.4 Definition of Terms ........................................................................................... 3781
22.3.5 Clock and Frame Sync Generators ........................................................................ 3783
22.3.6 Signal Descriptions ........................................................................................... 3787
22.3.7 Pin Multiplexing ............................................................................................... 3787
22.3.8 Transfer Modes ............................................................................................... 3788
22.3.9 General Architecture ......................................................................................... 3795
22.3.10 Operation ..................................................................................................... 3799
22.3.11 Reset Considerations ....................................................................................... 3816
22.3.12 Setup and Initialization ..................................................................................... 3816
22.3.13 Interrupts ..................................................................................................... 3821
22.3.14 EDMA Event Support ....................................................................................... 3823
22.3.15 Power Management ........................................................................................ 3825
22.3.16 Emulation Considerations .................................................................................. 3825
22.4 McASP Registers ....................................................................................................... 3826
22.4.1 McASP CFG Registers ...................................................................................... 3826
22.4.2 McASP Data Port Registers ................................................................................ 3880
23 Controller Area Network (CAN) ........................................................................................ 3881
23.1 Introduction .............................................................................................................. 3882
23.1.1 DCAN Features ............................................................................................... 3882
23.1.2 Unsupported DCAN Features ............................................................................... 3882
23.2 Integration ............................................................................................................... 3883
23.2.1 DCAN Connectivity Attributes ............................................................................... 3883
23.2.2 DCAN Clock and Reset Management ..................................................................... 3884
23.2.3 DCAN Pin List ................................................................................................. 3884
23.3 Functional Description ................................................................................................. 3885
23.3.1 CAN Core ...................................................................................................... 3885
23.3.2 Message Handler ............................................................................................. 3886
23.3.3 Message RAM ................................................................................................ 3886
23.3.4 Message RAM Interface ..................................................................................... 3886
23.3.5 Registers and Message Object Access ................................................................... 3886
23.3.6 Module Interface .............................................................................................. 3886
23.3.7 Dual Clock Source ........................................................................................... 3886
23.3.8 CAN Operation ................................................................................................ 3887
23.3.9 Dual Clock Source ........................................................................................... 3893
23.3.10 Interrupt Functionality ...................................................................................... 3894
23.3.11 Local Power-Down Mode .................................................................................. 3896
23.3.12 Parity Check Mechanism .................................................................................. 3898
23.3.13 Debug/Suspend Mode ..................................................................................... 3899
23.3.14 Configuration of Message Objects ........................................................................ 3899
23.3.15 Message Handling .......................................................................................... 3902
23.3.16 CAN Bit Timing .............................................................................................. 3907
23.3.17 Message Interface Register Sets ......................................................................... 3915
12
Contents SPRUH73H–October 2011–Revised April 2013
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