www.ti.com
Enhanced PWM (ePWM) Module
Table 15-31. EPWMx Initialization for Figure 15-32
Register Bit Value Comments
TBPRD TBPRD 600 (258h) Period = 601 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCNT TBCNT 0 Clear TB counter
TBCTL CTRMODE TB_UPDOWN
PHSEN TB_DISABLE Phase loading disabled
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_DISABLE
HSPCLKDIV TB_DIV1 TBCLK = SYSCLK
CLKDIV TB_DIV1
CMPA CMPA 250 (FAh) Compare A = 250 TBCLK counts
CMPB CMPB 450 (1C2h) Compare B = 450 TBCLK counts
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA CAU AQ_SET
CBD AQ_CLEAR
AQCTLB ZRO AQ_CLEAR
PRD AQ_SET
Table 15-32. EPWMx Run Time Changes for Figure 15-32
Register Bit Value Comments
CMPA CMPA EdgePosA Adjust duty for output EPWM1A
CMPB CMPB EdgePosB
1533
SPRUH73H–October 2011–Revised April 2013 Pulse-Width Modulation Subsystem (PWMSS)
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
