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Enhanced PWM (ePWM) Module
Table 15-52. EPWM3 Initialization for Figure 15-62
Register Bit Value Comments
TBPRD TBPRD 800 (320h) Period = 1600 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UPDOWN
PHSEN TB_ENABLE Slave module
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_IN Sync flow-through
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA CAU AQ_SET Set actions for EPWM3A
CAD AQ_CLEAR
DBCTL MODE DB_FULL_ENABLE Enable Dead-band module
POLSEL DB_ACTV_HIC Active Hi complementary
DBFED DBFED 50 FED = 50 TBCLKs
DBRED 50 RED = 50 TBCLKs
Example 15-6. Code Snippet for Configuration in Figure 15-62
// Run Time (Note: Example execution of one run-time instance)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 500; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 700; // adjust duty for output EPWM3A
1571
SPRUH73H–October 2011–Revised April 2013 Pulse-Width Modulation Subsystem (PWMSS)
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