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Multimedia Card Registers
Table 18-24. SD_CON Register Field Descriptions (continued)
Bit Field Type Reset Description
3 STR R/W 0h Stream command (MMC cards only).
This bit must be set to 1 only for the stream data transfers (read or
write) of the adtc commands.
Stream read is a class 1 command
(CMD11READ_DAT_UNTIL_STOP).
Stream write is a class 3 command
(CMD20WRITE_DAT_UNTIL_STOP).
0x0 = Block oriented data transfer
0x1 = Stream oriented data transfer
2 HR R/W 0h Broadcast host response (MMC cards only).
This register is used to force the host to generate a
48-bit response for bc command type.
It can be used to terminate the interrupt mode by generating a
CMD40 response by the core.
In order to have the host response to be generated in open drain
mode, the register SD_CON[OD] must be set to 1.
When SD_CON[12] CEATA bit is set to 1 and SD_ARG cleared to 0,
when writing 0000 0000h into SD_CMD register, the host controller
performs a 'command completion signal disable' token (i.e.,
mmc_cmd line held to 0 during 47 cycles followed by a 1).
0x0 = The host does not generate a 48-bit response instead of a
command.
0x1 = The host generates a 48-bit response instead of a command
or a command completion signal disable token.
1 INIT R/W 0h Send initialization stream (all cards).
When this bit is set to 1, and the card is idle, an initialization
sequence is sent to the card.
An initialization sequence consists of setting the mmc_cmd line to 1
during 80 clock cycles.
The initialization sequence is mandatory - but it is not required to do
it through this bit - this bit makes it easier.
Clock divider (SD_SYSCTL
[15:6] CLKD bits) should be set to ensure that 80 clock periods are
greater than 1ms.
Note: In this mode, there is no command sent to the card and no
response is expected.
A command complete interrupt will be generated once the
initialization sequence is completed.
SD_STAT[0] CC bit can be polled.
0x0 = The host does not send an initialization sequence
0x1 = The host sends an initialization sequence
0 OD R/W 0h Card open drain mode (MMC cards only).
This bit must be set to 1 for MMC card commands 1, 2, 3 and 40,
and if the MMC card bus is operating in open-drain mode during the
response phase to the command sent.
Typically, during card identification mode when the card is either in
idle, ready or ident state.
It is also necessary to set this bit to 1, for a broadcast host response
(see Broadcast host response register SD_CON[2] HR bit).
0x0 = No open drain
0x1 = Open drain or broadcast host response
3401
SPRUH73H–October 2011–Revised April 2013 Multimedia Card (MMC)
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