PRCM
2
1
4
3
2
1
0
0
x6
6
6
6
6
TCLKIN
32,768 Hz
Xtal
Device
Xtal
CLK_32KHZ
From PLL
32,768 Hz
~32,768 Hz
32,768 Hz
To
DMTIMER1_1ms
PRCMCLKSEL_TIME
R1MS_CLK.CLKSEL
(Default: 0)
To
DMTIMER{2-7}
PRCMCLKSEL_TIME
Rn_CLK.CLKSEL
(Default: 1)
Master
Osc
(CLK_M_OSC)
On-Chip
32K RC Osc
(CLK_RC32K)
32K
Osc
(CLK_32K_RTC)
Power, Reset, and Clock Management
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The clock selections for the other device Timer modules are shown in Figure 8-17. CLK_32KHZ, the
master oscillator, and the external pin (TCLKIN) are optional clocks available for timers which may be
selected based on end use application.
DMTIMER1 is implemented using the DMTimer_1ms module which is capable of generating an accurate
1ms tick using a 32.768 KHz clock. During low power modes, the Master Oscillator is disabled.
CLK_32KHZ also would not be available in this scenario since it is sourced from the Master Osc based
PER PLL. Hence, in low power modes DMTIMER1 in the WKUP domain can use the 32K RC oscillator for
generating the OS (operating system) 1ms tick generation and timer based wakeup. Since most
applications expect an accurate 1ms OS tick which the inaccurate 32K RC (16-60 KHz) oscillator cannot
provide, a separate 32768 Hz oscillator (32K Osc) is provided as another option.
Figure 8-17. Timer Clock Selection
All mux selections are in PRCM unless explicitly shown otherwise in the diagrams.
The RTC, Debounce and VTP clock options are shown in Figure 8-18. In low power modes, the debounce
for GPIO0 in WKUP domain can use the accurate 32768 Hz crystal oscillator or the inaccurate (16 KHz to
60 KHz) 32K RC oscillator when the Master Osc is powered down.
The 32K Osc requires an external 32768-Hz crystal.
All mux selections are in PRCM unless explicitly shown otherwise in the diagrams.
534
Power, Reset, and Clock Management (PRCM) SPRUH73H–October 2011–Revised April 2013
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Copyright © 2011–2013, Texas Instruments Incorporated
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