CONTROL_MODULE Registers
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Table 9-10. CONTROL_MODULE REGISTERS (continued)
Offset Acronym Register Description Section
934h conf_mii1_rxd3 Section 9.3.51
938h conf_mii1_rxd2 Section 9.3.51
93Ch conf_mii1_rxd1 Section 9.3.51
940h conf_mii1_rxd0 Section 9.3.51
944h conf_rmii1_ref_clk Section 9.3.51
948h conf_mdio Section 9.3.51
94Ch conf_mdc Section 9.3.51
950h conf_spi0_sclk Section 9.3.51
954h conf_spi0_d0 Section 9.3.51
958h conf_spi0_d1 Section 9.3.51
95Ch conf_spi0_cs0 Section 9.3.51
960h conf_spi0_cs1 Section 9.3.51
964h conf_ecap0_in_pwm0_out Section 9.3.51
968h conf_uart0_ctsn Section 9.3.51
96Ch conf_uart0_rtsn Section 9.3.51
970h conf_uart0_rxd Section 9.3.51
974h conf_uart0_txd Section 9.3.51
978h conf_uart1_ctsn Section 9.3.51
97Ch conf_uart1_rtsn Section 9.3.51
980h conf_uart1_rxd Section 9.3.51
984h conf_uart1_txd Section 9.3.51
988h conf_i2c0_sda Section 9.3.51
98Ch conf_i2c0_scl Section 9.3.51
990h conf_mcasp0_aclkx Section 9.3.51
994h conf_mcasp0_fsx Section 9.3.51
998h conf_mcasp0_axr0 Section 9.3.51
99Ch conf_mcasp0_ahclkr Section 9.3.51
9A0h conf_mcasp0_aclkr Section 9.3.51
9A4h conf_mcasp0_fsr Section 9.3.51
9A8h conf_mcasp0_axr1 Section 9.3.51
9ACh conf_mcasp0_ahclkx Section 9.3.51
9B0h conf_xdma_event_intr0 Section 9.3.51
9B4h conf_xdma_event_intr1 Section 9.3.51
9B8h conf_warmrstn Section 9.3.51
9C0h conf_nnmi Section 9.3.51
9D0h conf_tms Section 9.3.51
9D4h conf_tdi Section 9.3.51
9D8h conf_tdo Section 9.3.51
9DCh conf_tck Section 9.3.51
9E0h conf_trstn Section 9.3.51
9E4h conf_emu0 Section 9.3.51
9E8h conf_emu1 Section 9.3.51
9F8h conf_rtc_pwronrstn Section 9.3.51
9FCh conf_pmic_power_en Section 9.3.51
A00h conf_ext_wakeup Section 9.3.51
A04h conf_rtc_kaldo_enn Section 9.3.51
A1Ch conf_usb0_drvvbus Section 9.3.51
760
Control Module SPRUH73H–October 2011–Revised April 2013
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