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CONTROL_MODULE Registers
Table 9-10. CONTROL_MODULE REGISTERS (continued)
Offset Acronym Register Description Section
878h conf_gpmc_ben1 Section 9.3.51
87Ch conf_gpmc_csn0 Section 9.3.51
880h conf_gpmc_csn1 Section 9.3.51
884h conf_gpmc_csn2 Section 9.3.51
888h conf_gpmc_csn3 Section 9.3.51
88Ch conf_gpmc_clk Section 9.3.51
890h conf_gpmc_advn_ale Section 9.3.51
894h conf_gpmc_oen_ren Section 9.3.51
898h conf_gpmc_wen Section 9.3.51
89Ch conf_gpmc_ben0_cle Section 9.3.51
8A0h conf_lcd_data0 Section 9.3.51
8A4h conf_lcd_data1 Section 9.3.51
8A8h conf_lcd_data2 Section 9.3.51
8ACh conf_lcd_data3 Section 9.3.51
8B0h conf_lcd_data4 Section 9.3.51
8B4h conf_lcd_data5 Section 9.3.51
8B8h conf_lcd_data6 Section 9.3.51
8BCh conf_lcd_data7 Section 9.3.51
8C0h conf_lcd_data8 Section 9.3.51
8C4h conf_lcd_data9 Section 9.3.51
8C8h conf_lcd_data10 Section 9.3.51
8CCh conf_lcd_data11 Section 9.3.51
8D0h conf_lcd_data12 Section 9.3.51
8D4h conf_lcd_data13 Section 9.3.51
8D8h conf_lcd_data14 Section 9.3.51
8DCh conf_lcd_data15 Section 9.3.51
8E0h conf_lcd_vsync Section 9.3.51
8E4h conf_lcd_hsync Section 9.3.51
8E8h conf_lcd_pclk Section 9.3.51
8ECh conf_lcd_ac_bias_en Section 9.3.51
8F0h conf_mmc0_dat3 Section 9.3.51
8F4h conf_mmc0_dat2 Section 9.3.51
8F8h conf_mmc0_dat1 Section 9.3.51
8FCh conf_mmc0_dat0 Section 9.3.51
900h conf_mmc0_clk Section 9.3.51
904h conf_mmc0_cmd Section 9.3.51
908h conf_mii1_col Section 9.3.51
90Ch conf_mii1_crs Section 9.3.51
910h conf_mii1_rx_er Section 9.3.51
914h conf_mii1_tx_en Section 9.3.51
918h conf_mii1_rx_dv Section 9.3.51
91Ch conf_mii1_txd3 Section 9.3.51
920h conf_mii1_txd2 Section 9.3.51
924h conf_mii1_txd1 Section 9.3.51
928h conf_mii1_txd0 Section 9.3.51
92Ch conf_mii1_tx_clk Section 9.3.51
930h conf_mii1_rx_clk Section 9.3.51
759
SPRUH73H–October 2011–Revised April 2013 Control Module
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