RX Mode
RxPktRdy
Set?
No
Return
Yes
Read Count0
Register ( )n
Unload Bytes
From FIFO
n
Last Packet
No
Set
ServicedRxPktRdy
Yes
Set ServicedRxPktRdy
and DataEnd
State IDLE®
Return
www.ti.com
Functional Description
16.3.8.1.1.4.4 Rx Mode: Control Transfer of Peripheral Mode
In RX mode, all arriving data should be treated as part of a data phase until the expected amount of data
has been received. If either a SETUP or an IN token is received while the endpoint is in RX state, a
SETUPEND condition will occur as the controller expects only OUT tokens.
Three events can cause RX mode to be terminated before the expected amount of data has been
received as shown in Figure 16-7:
1. The host sends an invalid token causing a SETUPEND condition (setting bit 4 of PERI_CSR0).
2. The host sends a packet which contains less than the maximum packet size for endpoint 0.
3. The host sends an empty data packet.
Until the transaction is terminated, the software unloads the FIFO when it receives an interrupt that
indicates new data has arrived (setting RXPKTRDY bit of PERI_CSR0) and to clear RXPKTRDY by
setting the SERV_RXPKTRDY bit of PERI_CSR0 (bit 6).
When the software detects the termination of a transfer (by receiving either the expected amount of data
or an empty data packet), it should set the DATAEND bit (bit 3 of PERI_CSR0) to indicate to the controller
that the data phase is complete and that the core should receive an acknowledge packet next.
Figure 16-7. Flow Chart of Receive Data Stage of a Control Transfer in Peripheral Mode
1709
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
