Texas Instruments AM335 Series Technical Reference Manual

Valid Address
Valid Address
Data
OUT
CSONTIME
CSWROFFTIME
ADVONTIME
ADVWROFFTIME
WEONTIME
WRDATAONADMUXBUS
WEOFFTIME
WRCYCLETIME
GPMC_FCLK
GPMC_CLK
A[27:17]
A[16:1]/D[15:0]
nBE1/nBE0
nCS
nADV
nWE
DIR
WAIT
www.ti.com GPMC
7.1.3.3.10.2.3 Synchronous Single Write
Burst write mode is used for synchronous single or burst accesses (see Figure 7-21).
Figure 7-21. Synchronous Single Write on an Address/Data-Multiplexed Device
When the GPMC generates a write access to an address/data-multiplexed device, it drives the data bus
(with address bits A[16:1]) until [19:16] WRDATAONADMUXBUS time. First data of the burst is driven on
the address/data bus at WRDATAONADMUXBUS time.
293
SPRUH73H–October 2011–Revised April 2013 Memory Subsystem
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English