Texas Instruments AM335 Series Technical Reference Manual

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8.1.11 Device Modules and Power Management Attributes List ................................................. 545
8.1.12 Clock Module Registers ....................................................................................... 548
8.1.13 Power Management Registers ............................................................................... 705
9 Control Module ................................................................................................................ 746
9.1 Introduction ............................................................................................................... 747
9.2 Functional Description ................................................................................................... 747
9.2.1 Control Module Initialization ................................................................................... 747
9.2.2 Pad Control Registers .......................................................................................... 747
9.2.3 EDMA Event Multiplexing ...................................................................................... 748
9.2.4 Device Control and Status ..................................................................................... 749
9.2.5 DDR PHY ........................................................................................................ 756
9.3 CONTROL_MODULE Registers ....................................................................................... 757
9.3.1 control_revision Register (offset = 0h) [reset = 0h] ......................................................... 762
9.3.2 control_hwinfo Register (offset = 4h) [reset = 0h] .......................................................... 763
9.3.3 control_sysconfig Register (offset = 10h) [reset = 0h] ..................................................... 764
9.3.4 control_status Register (offset = 40h) [reset = 0h] ......................................................... 765
9.3.5 control_emif_sdram_config Register (offset = 110h) [reset = 0h] ........................................ 766
9.3.6 core_sldo_ctrl Register (offset = 428h) [reset = 0h] ........................................................ 768
9.3.7 mpu_sldo_ctrl Register (offset = 42Ch) [reset = 0h] ....................................................... 769
9.3.8 clk32kdivratio_ctrl Register (offset = 444h) [reset = 0h] ................................................... 770
9.3.9 bandgap_ctrl Register (offset = 448h) [reset = 0h] ......................................................... 771
9.3.10 bandgap_trim Register (offset = 44Ch) [reset = 0h] ....................................................... 772
9.3.11 pll_clkinpulow_ctrl Register (offset = 458h) [reset = 0h] .................................................. 773
9.3.12 mosc_ctrl Register (offset = 468h) [reset = 0h] ............................................................ 774
9.3.13 deepsleep_ctrl Register (offset = 470h) [reset = 0h] ...................................................... 775
9.3.14 dpll_pwr_sw_status (offset = 50Ch) [reset = 0h] .......................................................... 776
9.3.15 device_id Register (offset = 600h) [reset = 0x] ............................................................ 777
9.3.16 dev_feature Register (offset = 604h) [reset = 0h] ......................................................... 778
9.3.17 init_priority_0 Register (offset = 608h) [reset = 0h] ........................................................ 779
9.3.18 init_priority_1 Register (offset = 60Ch) [reset = 0h] ....................................................... 780
9.3.19 mmu_cfg Register (offset = 610h) [reset = 0h] ............................................................. 781
9.3.20 tptc_cfg Register (offset = 614h) [reset = 0h] .............................................................. 782
9.3.21 usb_ctrl0 Register (offset = 620h) [reset = 0h] ............................................................. 783
9.3.22 usb_sts0 Register (offset = 624h) [reset = 0h] ............................................................. 785
9.3.23 usb_ctrl1 Register (offset = 628h) [reset = 0h] ............................................................. 786
9.3.24 usb_sts1 Register (offset = 62Ch) [reset = 0h] ............................................................ 788
9.3.25 mac_id0_lo Register (offset = 630h) [reset = 0h] .......................................................... 789
9.3.26 mac_id0_hi Register (offset = 634h) [reset = 0h] .......................................................... 790
9.3.27 mac_id1_lo Register (offset = 638h) [reset = 0h] .......................................................... 791
9.3.28 mac_id1_hi Register (offset = 63Ch) [reset = 0h] ......................................................... 792
9.3.29 dcan_raminit Register (offset = 644h) [reset = 0h] ........................................................ 793
9.3.30 usb_wkup_ctrl Register (offset = 648h) [reset = 0h] ...................................................... 794
9.3.31 gmii_sel Register (offset = 650h) [reset = 0h] .............................................................. 795
9.3.32 pwmss_ctrl Register (offset = 664h) [reset = 0h] .......................................................... 796
9.3.33 mreqprio_0 Register (offset = 670h) [reset = 0h] .......................................................... 797
9.3.34 mreqprio_1 Register (offset = 674h) [reset = 0h] .......................................................... 798
9.3.35 hw_event_sel_grp1 Register (offset = 690h) [reset = 0h] ................................................ 799
9.3.36 hw_event_sel_grp2 Register (offset = 694h) [reset = 0h] ................................................ 800
9.3.37 hw_event_sel_grp3 Register (offset = 698h) [reset = 0h] ................................................ 801
9.3.38 hw_event_sel_grp4 Register (offset = 69Ch) [reset = 0h] ................................................ 802
9.3.39 smrt_ctrl Register (offset = 6A0h) [reset = 0h] ............................................................. 803
9.3.40 mpuss_hw_debug_sel Register (offset = 6A4h) [reset = 0h] ............................................ 804
9.3.41 mpuss_hw_dbg_info Register (offset = 6A8h) [reset = 0h] ............................................... 805
4
Contents SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English