Texas Instruments AM335 Series Technical Reference Manual

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10.1.1 Terminology ..................................................................................................... 864
10.1.2 L3 Interconnect ................................................................................................. 864
10.1.3 L4 Interconnect ................................................................................................. 868
11 Enhanced Direct Memory Access (EDMA) ........................................................................... 869
11.1 Introduction ............................................................................................................... 870
11.1.1 EDMA3 Controller Block Diagram ........................................................................... 870
11.1.2 Third-Party Channel Controller (TPCC) Overview ......................................................... 870
11.1.3 Third-Party Transfer Controller (TPTC) Overview ......................................................... 871
11.2 Integration ................................................................................................................. 873
11.2.1 Third-Party Channel Controller (TPCC) Integration ....................................................... 873
11.2.2 Third-Party Transfer Controller (TPTC) Integration ....................................................... 874
11.3 Functional Description ................................................................................................... 876
11.3.1 Functional Overview ........................................................................................... 876
11.3.2 Types of EDMA3 Transfers ................................................................................... 879
11.3.3 Parameter RAM (PaRAM) .................................................................................... 881
11.3.4 Initiating a DMA Transfer ..................................................................................... 893
11.3.5 Completion of a DMA Transfer ............................................................................... 896
11.3.6 Event, Channel, and PaRAM Mapping ...................................................................... 897
11.3.7 EDMA3 Channel Controller Regions ........................................................................ 899
11.3.8 Chaining EDMA3 Channels .................................................................................. 901
11.3.9 EDMA3 Interrupts .............................................................................................. 902
11.3.10 Memory Protection ........................................................................................... 908
11.3.11 Event Queue(s) ............................................................................................... 912
11.3.12 EDMA3 Transfer Controller (EDMA3TC) .................................................................. 914
11.3.13 Event Dataflow ................................................................................................ 917
11.3.14 EDMA3 Prioritization ......................................................................................... 917
11.3.15 EDMA3 Operating Frequency (Clock Control) ............................................................ 918
11.3.16 Reset Considerations ........................................................................................ 918
11.3.17 Power Management .......................................................................................... 918
11.3.18 Emulation Considerations ................................................................................... 918
11.3.19 EDMA Transfer Examples ................................................................................... 920
11.3.20 EDMA Events ................................................................................................. 936
11.4 EDMA3 Registers ........................................................................................................ 939
11.4.1 EDMA3 Channel Controller Registers ....................................................................... 939
11.4.2 EDMA3 Transfer Controller Registers ....................................................................... 993
11.5 Appendix A .............................................................................................................. 1018
11.5.1 Debug Checklist .............................................................................................. 1018
11.5.2 Miscellaneous Programming/Debug Tips ................................................................. 1019
11.5.3 Setting Up a Transfer ........................................................................................ 1020
12 Touchscreen Controller .................................................................................................. 1022
12.1 Introduction .............................................................................................................. 1023
12.1.1 TSC_ADC Features .......................................................................................... 1023
12.1.2 Unsupported TSC_ADC_SS Features .................................................................... 1023
12.2 Integration ............................................................................................................... 1024
12.2.1 TSC_ADC Connectivity Attributes .......................................................................... 1024
12.2.2 TSC_ADC Clock and Reset Management ................................................................ 1025
12.2.3 TSC_ADC Pin List ............................................................................................ 1025
12.3 Functional Description ................................................................................................. 1026
12.3.1 HW Synchronized or SW Channels ........................................................................ 1026
12.3.2 Open Delay and Sample Delay ............................................................................. 1026
12.3.3 Averaging of Samples (1, 2, 4, 8, and 16) ................................................................ 1026
12.3.4 One-Shot (Single) or Continuous Mode ................................................................... 1026
12.3.5 Interrupts ...................................................................................................... 1026
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Contents SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English